A Self-Test of Dynamically Reconfigurable Processors with Test Frames

URI http://harp.lib.hiroshima-u.ac.jp/hiroshima-cu/metadata/6025
File
Title
A Self-Test of Dynamically Reconfigurable Processors with Test Frames
Author
氏名 INOUE Tomoo
ヨミ イノウエ トモオ
別名 井上 智生
氏名 FUJII Takashi
ヨミ フジイ タカシ
別名 市原 英行
氏名 ICHIHARA Hideyuki
ヨミ イチハラ ヒデユキ
別名
Subject
dynamically reconfigurable processors
self-test
optimal contexts
test application time
test frames
Abstract

This paper proposes a self-test method of coarse grain dynamically reconfigurable processors (DRPs) without hardware overhead. In the method, processor elements (PEs) compose a test frame, which consists of test pattern generators (TPGs), processor elements under test (PEUTs) and response analyzers (RAs), while testing themselves one another by changing test frames appropriately. We design several test frames with different structures, and discuss the relationship of the structures to the numbers of contexts and test frames for testing all the functions of PEs. A case study shows that there exists an optimal test frame which minimizes the test application time under a constraint.

Description Peer Reviewed
Journal Title
IEICE TRANSACTIONS on Information and Systems
Volume
E91-D
Issue
3
Spage
756
Epage
762
Published Date
2008-03-01
Publisher
電子情報通信学会(IEICE)
ISSN
0916-8532
Language
eng
NIIType
Journal Article
Text Version
出版社版
Rights
copyright©2008IEICE
Relation URL
Old URI
Set
hiroshima-cu