An Architecture of Embedded Decompressor with Reconfigurability for Test Compression

URI http://harp.lib.hiroshima-u.ac.jp/hiroshima-cu/metadata/6024
ファイル
タイトル
An Architecture of Embedded Decompressor with Reconfigurability for Test Compression
著者
氏名 ICHIHARA Hideyuki
ヨミ イチハラ ヒデユキ
別名 市原 英行
氏名 SAIKI Tomoyuki
ヨミ サイキ トモユキ
別名 井上 智生
氏名 INOUE Tomoo
ヨミ イノウエ トモオ
別名
キーワード
test compression
ATE
reconfigurability
variable-length coding
test application
抄録

Test compression / decompression scheme for reducing the test application time and memory requirement of an LSI tester has been proposed. In the scheme, the employed coding algorithms are tailored to a given test data, so that the tailored coding algorithm can highly compress the test data. However, these methods have some drawbacks, e.g., the coding algorithm is ineffective in extra test data except for the given test data. In this paper, we introduce an embedded decompressor that is reconfigurable according to coding algorithms and given test data. Its reconfigurability can overcome the drawbacks of conventional decompressors with keeping high compression ratio. Moreover, we propose an architecture of reconfigurable decompressors for four variable-length codings. In the proposed architecture, the common functions for four codings are implemented as fixed (or non-reconfigurable) components so as to reduce the configuration data, which is stored on an ATE and sent to a CUT. Experimental results show that (1) the configuration data size becomes reasonably small by reducing the configuration part of the decompressor, (2) the reconfigurable decompressor is effective for SoC testing in respect of the test data size, and (3) it can achieve an optimal compression of test data by Huffman coding.

査読の有無
掲載雑誌名
IEICE TRANSACTIONS on Information and Systems
E91-D
3
開始ページ
713
終了ページ
719
出版年月日
2008-03-01
出版者
電子情報通信学会(IEICE)
ISSN
0916-8532
本文言語
英語
資料タイプ
学術雑誌論文
著者版フラグ
出版社版
権利情報
copyright©2008 IEICE
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旧URI
区分
hiroshima-cu