低消費電力エッジノードプロセッサの研究

URI http://harp.lib.hiroshima-u.ac.jp/it-hiroshima/metadata/12144
File
Title
低消費電力エッジノードプロセッサの研究
Title Alternative
A Study on Low Power Consumption Edge Node Processors
Author
氏名 近藤 明弘
ヨミ コンドウ アキヒロ
別名 Kondo Akihiro
氏名 鬼追 一雅
ヨミ キオイ カズマサ
別名 Kioi Kazumasa
Subject
Low Power
edge node processor
FPGA
Arduino
Abstract

A novel edge node processor has been studied. As a first step, a memory controller and a processor have been implemented on an FPGA successively. Experimental results using the FPGA and an Arduino are given in this paper.

Journal Title
広島工業大学紀要. 研究編
Volume
51
Spage
45
Epage
48
Published Date
2017-02
Publisher
広島工業大学
ISSN
1346-9975
NCID
AA11599110
Language
jpn
NIIType
Departmental Bulletin Paper
Text Version
出版社版
Set
it-hiroshima