小規模集積回路(SSI)を用いた設計・プロセス・評価の一貫教育システムの構築

URI http://harp.lib.hiroshima-u.ac.jp/it-hiroshima/metadata/8191
ファイル
タイトル
小規模集積回路(SSI)を用いた設計・プロセス・評価の一貫教育システムの構築
別タイトル
Basic consecutive system consisted of design, process, and estimation of small scale integrated circuits (SSI)
著者
氏名 田中 武
ヨミ タナカ タケシ
別名 Tanaka Takeshi
氏名 伊藤 啓一
ヨミ イトウ ケイイチ
別名 Itoh Keiichi
氏名 山田 明宏
ヨミ ヤマダ アキヒロ
別名 Yamada Akihiro
キーワード
VLSI design
semiconductor process engineering
CAD
SSI
NDC
549.7
抄録

Department of Electronic and Electrical Engineering of Hiroshima Institute of Technology have been teaching integrated circuit designs and processes of semiconductors since 1989 term. In Electronic Experiments III, students learned the primitive logic circuits such as NOT, AND, etc and their combination circuits that were expressed by schematic logic design using the Graphic Editor, one of the MAX-Plus II applications. Designed circuits were programmed for the FPGA device and the operation of the designed circuits is confirmed by using push switches and LED. Students designed the small scale integrated circuits (SSI) consisted of CMOS FET using α-SX Custom Design Platform (Jedat Innovation Inc.), and semiconductor processing for SSI in Kitakyushu Science and Research Park. The operation of the fabricated SSI was confirmed using ID-VD characteristic of CMOS FET by students in Electronic and Computer Engineering experiment C and D. They had the successful experience to design, and to test SSI in Electronic and Computer Engineering experiment C and D.

掲載雑誌名
広島工業大学紀要. 研究編
44
開始ページ
1
終了ページ
5
出版年月日
2010-02
出版者
広島工業大学
ISSN
1346-9975
NCID
AA11599110
本文言語
日本語
資料タイプ
紀要論文
著者版フラグ
出版社版
旧URI
区分
it-hiroshima