プリント基板配線の電気検査順序に対する先行順序制約を考慮した2-opt法 に基づく解法

URI http://harp.lib.hiroshima-u.ac.jp/it-hiroshima/metadata/12117
File
Title
プリント基板配線の電気検査順序に対する先行順序制約を考慮した2-opt法 に基づく解法
Title Alternative
A Solution Method Based on 2-opt Method Considering Precedence Constrains for Electrical Inspection Order of Printed Circuit Boards
Author
氏名 藤井 時男
ヨミ フジイ トキオ
別名 Fujii Tokio
氏名 奥村 昇平
ヨミ オクムラ ショウヘイ
別名 Okumura Shohei
氏名 加藤 浩介
ヨミ カトウ コウスケ
別名 Kato Kosuke
氏名 片桐 英樹
ヨミ カタギリ ヒデキ
別名 Katagiri Hideki
氏名 羽森 寛
ヨミ ハモリ ヒロシ
別名 Hamori Hiroshi
Abstract

In recent years, electrical inspections of wirings on printed circuit boards have been important since pattern pitches have decreased with rapid downsizing of electronic devices. Because a typical electric inspection is carried out every wiring pattern on a printed circuit board, the optimization of the inspection order draws attention for the improvement of production efficiency. In this research, we formulate an inspection order optimization problem for inspection of wiring patterns on printed circuit boards as a traveling salesman problem with precedence constraints and propose a solution method based on 2-opt method.

Journal Title
IEEE SMC Hiroshima Chapter Young Researchers' Workshop proceedings : IEEE SMC Hiroshima Chapter若手研究会講演論文集
Volume
2014
Spage
21
Epage
22
Published Date
2014-07
Publisher
IEEE SMC Hiroshima Chapter
ISSN
2187-3577
NCID
HP01495586
Language
jpn
NIIType
Conference Paper
Text Version
著者版
Rights
©Copyright by IEEE SMC Hiroshima Chapter. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
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