On an Education of LSI Design using IP in Hiroshima Institute of Technology
The departments of Electronic and Electrical Engineering of Hiroshima Institute of Technology have been teaching integrated circuit designs and processes of semiconductors since 1989. In Electronic Experiments III, students design the logic circuits using fundamental intellectual property (lP) such as BCD-7 segment decoder, shift register, etc. that are expressed by schematic logic design using Graphic Editor, one of MAX-Plus II applications. Typically, students' design time of BCD-7 segment decoder which consists of logic circuits such as NAND, INV, etc. is about 2-3hours. BCD-7 segment decoder is programmed for the FPGA device and its function is confirmed by using push switches and LED. Almost all the students find it best to design the logic circuits using fundamental IP’s. The IP database for VLSI design has been also developed. This database is used to support lectures such as Freshman Seminar, Digital Computer Engineering, Electrical Experiments II, and Design and Drawing.